| 摘要 |
1,173,347. Modulation. COMPAGNIE FRANCAISE THOMSON HOUSTONHOTCHKISS-BRANDT. 12 July, 1967 [19 July, 1966], No. 32164/67. Heading H3R. Digital data input signals on line 2, Fig. 1, are fed directly and through inverter 200 to a bi-stable 3 controlling AND gates 4, 4N which are supplied with clock pulses at the bit rate from a generator 5. The outputs of gates 4 and 4N may be short pulses which are respectively positive and negative and are fed through equal coupling networks 6, 7 to a low-pass filter 10 having a cut-off frequency equal to the bit rate. In this case the output of the filter 10 will be half-cycles of a sine wave at the bit frequency, the polarities varying according to the data input (Fig. 3, not shown). Alternatively the gates 4 and 4N may produce the same outputs but feed different coupling resistances 7 so that the output varies in amplitude according to the data input (Figs. 9 and 10, not shown). The actual response of the filter 10 to an input pulse (wave B, Fig. 2, not shown), may differ from that desired (wave A); compensation for this may be provided by feeding the input data to a four-stage shift register (30, Fig. 3, not shown), each stage of which is coupled to the output filter as in Fig. 1, the coupling resistances (70, 71) equivalent to resistances 7 being proportioned according to the actual response wave of the filter 10. The low-pass filter may be replaced by a band-pass filter having a mean frequency fp and a passband of 2fc. If fp is an even multiple of fc no modification is necessary; if fp is an odd multiple of fc (Fig. 6b, not shown) there is a phase change of 180 degrees in the notional carrier wave after each bit, and this may be avoided by inverting alternate input data pulses (in coder 80, Fig. 7, not shown); if fp is an odd multiple of half fc (Figs. 6c and 6d, not shown) there is a phase change of 90 degrees after each bit, and this may be avoided by an input coder unit (800, Fig. 8, not shown) which opens in succession the four sets of gates (40-O, 40-E, 41-E and 41-O) associated with each stage of the shift register (30), thereby effectively altering the phase of each successive bit by 90 degrees. |
