发明名称 DATA PROCESSING CIRCUIT
摘要 PURPOSE:To control surely the transfer of an input data without providing a control terminal, by providing a control part in a processing circuit. CONSTITUTION:Four-bit data inputted from a data input terminal 1 is taken into an address latch 3 at one edge of the input signal of an input control terminal 2, and a data latch 5 of addresses A1-A8 is selected clearly by a data latch group selector 4. A next-stage circuit 6 connected to the data latch 5 is provided, and a specific one-bit latch synchronous with the data latch 3 of a specific address is provided. This specific one-bit latch is used as an internal control part 9 to control the data transfer from the data latch 5 to the next-stage circuit 6.
申请公布号 JPS5994125(A) 申请公布日期 1984.05.30
申请号 JP19820202880 申请日期 1982.11.20
申请人 MATSUSHITA DENKI SANGYO KK 发明人 OKADA YOSHIKO
分类号 G06F13/10;G06F3/00;(IPC1-7):06F3/00 主分类号 G06F13/10
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