发明名称 PULSE WIDTH MODULATING CIRCUIT
摘要 PURPOSE:To eliminate the necessity of an analog circuit and to reduce a ripple of a pulse width modulating circuit by providing a calculator and a timer, and digitally outputting a pulse width modulation signal. CONSTITUTION:When a processor 30 of an arithmetic circuit 3 outputs an amplitude command Id, a V-phase current command Vd and a command speed CV through a bus 36, a bus control circuit 13 and a bus 27 when the processor 30 calculates the amplitude command Id and retrieves the V-phase current command Vd. An arithmetic processor 10 executes the calculation on the basis of a calculating program stored in a memory contained in the processor, and calculates the period (OFF period) from the start of the period as a pulse width command signal and the pulse width time (ON period) of the pulse width signal. This pulse width command is set to a set of timer counters 11a, 11b, thereby generating PWM signals iuc, ivc, iwc.
申请公布号 JPS5992793(A) 申请公布日期 1984.05.29
申请号 JP19820201695 申请日期 1982.11.17
申请人 FANUC KK 发明人 FUJIOKA YOSHIMOTO;HIROTA MITSUHIKO
分类号 H02P21/00;H02M7/48;H02P27/04;H03K7/08 主分类号 H02P21/00
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