| 摘要 |
<p>PURPOSE:To stabilize the ground level speedily within a wide power source range and to increase the margin of a process sufficiently by connecting the gate of an N channel MOS transistor (TR) to the inverted output signal point of a logical signal. CONSTITUTION:When a logical signal H is at a logical level 0, a P channel MOS TR P-TR14 is on and an inverted logical signal H of VCC is inputted to the gate of the N channel MOS TR N-TR15 to increase the driving capability. Consequently, the voltage at a voltage output terminal 17 drops abuptly toward 0V. Then, a P-TR18 turns on and the P-TR14 turns off, so that the voltage at the terminal 17 approaches 0V more. When the logical signal H is inverted to a logical level 1, an N-TR12 turns on and then the P-TR14 starts turning on. Then, the voltage at the terminal 17 rises abruptly toward VPP. At this time, the N-TR15 turns off completely by a gate bias of 0V and the off operation of the P-TR18 is speeded up more.</p> |
