发明名称 SECOND ORDER DIGITAL FULL BAND PASSING CIRCUIT
摘要 PURPOSE:To obtain a circuit suitable for circuit integration by providing a means for obtaining an intermediate series satisfying a specific formula in the titled circuit and a storage means for obtaining another intermediate series from the former intermediate series so as to reduce remarkably the processing time in comparison with a conventional constitution. CONSTITUTION:The circuit consists of a register 3 storing the 1st intermediate series [Wn], a register 4 storing the 2nd intermediate series [Vn=aWn] and a register 5 storing the 3rd intermediate series [Un=abWn]. These parameters are multiplied by multipliers 6, 7. In figure, 8, 9 are adders. The arithmetic operation in this example is done as shown in formulae. The 1st intermediate series Wn is obtained by adding a value Vn-1 before one point of the 2nd intermediate series, a valve Un-2 before two points of the 3rd intermediate value and an input Xn, and the result is stored in the register 3. The aWn is obtained by the multiplier 6 and it is stored in the register 4, and the abWn is obtained by the multiplier 7 and it is stored in the register 5.
申请公布号 JPS5990419(A) 申请公布日期 1984.05.24
申请号 JP19820199393 申请日期 1982.11.13
申请人 SONY KK 发明人 TAKAHASHI HIROSHI
分类号 H03H17/08;H03H17/02 主分类号 H03H17/08
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