发明名称 Process for producing MOS transistors having shallow source/drain zones, self-aligning polysilicon contacts and short channel lengths
摘要 In a process for producing MOS transistors having shallow source/drain zones (7, 8), self-aligning polysilicon contacts (3, 4 and 12) and short channel lengths, the source/drain zones (7, 8) are produced by outdiffusion from a structure which is composed of a doped polysilicon layer (3, 4) and which subsequently acts as contact connection. The gate electrodes (12), which are composed of polysilicon, are produced in such a way that they overlap the diffused peripheral areas (17, 18) of the source/drain zones (7, 8). The process is used to produce MOS and CMOS circuits in the sub- mu m range. <IMAGE>
申请公布号 DE3243125(A1) 申请公布日期 1984.05.24
申请号 DE19823243125 申请日期 1982.11.22
申请人 SIEMENS AG 发明人 WERNER,CHRISTOPH,DR.;WIEDER,ARMIN,DR.
分类号 H01L21/033;H01L21/225;H01L21/285;H01L21/336;H01L29/78;(IPC1-7):H01L21/18;H01L27/04;H01L21/72 主分类号 H01L21/033
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