| 摘要 |
PURPOSE:To control the transmission of data in a short overhead time of transmission and a simple procedure by using a double port memory at an interface part of a data transmission controller and mixing an access region of the double port memory into an address space. CONSTITUTION:A CPU1 and a main storage device 2 are connected to a memory bus 4, and at the same time a data transmission controller 8 is also connected to the bus 4 with a double port memory 9 defined as an interface part. The controller 8 can have a free access to the memory 9 and also contains a local memory for a direct access. The data within the port 9 is stored in the address position corresponding consecutively to the address signal which is generated by the CPU1 and varies successively. The local signal which is generated at the controller 8 and varying successively undergoes an address conversion in order to give alternate accesses for each data block to the data in the local memory and the data in the port 9. As a result, the data transmission can be controlled in a short overhead time and with a simple procedure. |
