发明名称 POWER CONSUMPTION REDUCING CIRCUIT OF COMPUTER
摘要 PURPOSE:To enable remarkable reduction of power consumption by making a CPU a HALT mode when waiting key input, and releasing the HALT mode through interrupting operation by a clock signal having a period longer than the interval of key operation. CONSTITUTION:The operation input of a keyboard 2 is given to a key input terminal of a CPU1, and the CPU performs operation basing on the key input, and outputs the result to a printer 4 and a display 5. It becomes a HALT mode when waiting key input. To make interruption to release the HALT mode, an interruption command circuit 3 is connected to an interruption terminal INT of the CPU1. The circuit 3 gives a clock signal (set at the lowest time interval that does not overlook the key input) having a period longer than the period of key operation to the terminal INT as a HALT mode release interruption signal. The HALT mode is released by this.
申请公布号 JPS5979325(A) 申请公布日期 1984.05.08
申请号 JP19820190370 申请日期 1982.10.29
申请人 NEC HOME ELECTRONICS KK 发明人 OOSAKI SUKETSUGU
分类号 H02J1/00;G06F1/04;G06F1/32;G06F15/02 主分类号 H02J1/00
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