A semiconductor switching circuit with an overcurrent protection.

摘要

A semiconductor switching circuit (SW2) using a power MOS transistor (6) as a switching element, the drain (D6) thereof being connected to a DC power supply through a load (7) and the source (S6) thereof being grounded. The power MOS transistor is protected from destruction due to an excessive power dissipation when the load is short-circuited. The switching circuit basically comprises: (a) a first resistor (8) intervened between an input terminal (IN) at which the switching signal for turning on the power MOS transistor is inputted and gate (G6) of the power MOS transistor; (b) an integrator (12) which operatively integrates the drain potential of the power MOS transistor; (c) a second MOS transistor (9), the drain (D9) thereof being connected to the gate of the power MOS transistor (6), source thereof being grounded, and gate thereof being connected to the output terminal of the integrator (12), which turns on to ground the gate of the power MOS transistor so as to turn off the power MOS transistor when the output potential of the integrator exceeds a threshold thereof; (d) a third MOS transistor (13), the drain (D13) thereof being connected to the output terminal of the integrator (12) and a source thereof being grounded; and (e) an inverter (14) connected between the switching signal input terminal (IN) and the gate of the third MOS transistor which inverts the potential of the switching signal so that said integrator (12) starts integration when the switching signal is inputted and is reset when no switching signal is inputted, whereby the power MOS transistor (6) is forcefully turned off when the load (7) is shortcircuited.