发明名称 LOGICAL CIRCUIT TEST SYSTEM
摘要 PURPOSE:To test a logical circuit which has a high impedance output at a high speed by discriminating whether the test output of the logical circuit is higher than the a high level or lower than a low level and whether it is the high impedance output or not. CONSTITUTION:A voltage between the high and low levels is applied to input points of a high level comparator 1 and a low level comparator 2. Then, the case of the high impedance output of the logical circiut 22 is added as the 3rd test expected value. When the 3rd test expected value is indicated, whether the test output level is between the high and low level or not is discriminated by the outputs of the high and low level comparators.
申请公布号 JPS5975167(A) 申请公布日期 1984.04.27
申请号 JP19820186020 申请日期 1982.10.25
申请人 HITACHI SEISAKUSHO KK 发明人 MATSUMOTO TAKASHI
分类号 G01R31/28;G01R31/317;G06F11/00;(IPC1-7):01R31/28 主分类号 G01R31/28
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