发明名称 Method for fabricating an EEPROM.
摘要 <p>A floating-gate tunnel-injection type EEPROM having an excellent quality tunneling insulating layer (19) is fabricated by forming an impurity-doped region (28) under the tunneling insulating layer by diffusion from a neighboring region (26, 27).</p><p>The impurity-doped region (28) under the tunneling insulating layer (19) does not have an edge under the tunneling insulating layer. The substrate (13) under the tunneling insulating layer (19) is not damaged by any previous ion implantation process. Thus excellent operation of the EEPROM is enabled.</p>
申请公布号 EP0106617(A2) 申请公布日期 1984.04.25
申请号 EP19830306004 申请日期 1983.10.04
申请人 FUJITSU LIMITED 发明人 OSHIKAWA, YOSHIHIRO
分类号 H01L21/8247;G11C14/00;H01L21/336;H01L29/78;H01L29/788;H01L29/792;(IPC1-7):01L29/60 主分类号 H01L21/8247
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