发明名称 MANUFACTURE OF SEMICONDUCTOR DEVICE
摘要 PURPOSE:To gain the reverse recovery time corresponding to a sum concentration minimizing the reverse directional leakage current and normal directional voltage decline by a method wherein both gold and platinum are diffused in the same part on a semiconductor substrate as a lifetime killer. CONSTITUTION:Gold and platinum are diffused as a lifetime killer in a semiconductor silicon wafer 10 comprising an n<+> layer 3 wherein n type impurity is diffused at high concentration, a p<+> layer 5 on the opposit side wherein p type impurity is diffused at high concentration and an n base layer 4 between the two layers 3, 5. Both the reverse directional leakage current and the normal directional voltage decline may be minimized by means of appropriately setting up the gold concentration ratio in the n base layer 4 within the range from 5% to 95% constantly sustaining this feature even in case the sum concentration of gold and platinum is fluctuated.
申请公布号 JPS5972732(A) 申请公布日期 1984.04.24
申请号 JP19820182715 申请日期 1982.10.20
申请人 HITACHI SEISAKUSHO KK 发明人 SAITOU RIYUUICHI;HONMA HIDEO;NAITOU MASAMI;MONMA NAOHIRO
分类号 H01L21/322;H01L21/324;H01L29/74;H01L29/861 主分类号 H01L21/322
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