发明名称 WIRING METHOD FOR SEMICONDUCTOR DEVICE
摘要 PURPOSE:To improve the reliability of wiring, by accurately performing the wiring patterning of a first layer by RIE and the like, therafter forming an insulating film by a method characterized by a good step coverage, performing approximately just etching of said insulating film, thereby forming an interlayer insulating film having a flat surface by a low temperature process. CONSTITUTION:On an SiO2 film formed on an Si substrate 11, Al 33 is deposited as a wiring metal. Thereafter patterning is performed by parallel flat drawing type RIE. Then, Si3N4 film 44 is formed by a plasma CVD method. Then the parallel flat drawing type RIE by CF4 is performed. When the RIE of the Si3N4 film 44 is stopped by CF4, the Si3N4 film 44 remains at the sides of the Al pattern 33, which has a substantially thick film width. The shape of the Si3N4 film 44 intactly reflects the shape of the initial deposition, and becomes gentle. Al is again deposited as a second layer wiring by a heat sputtering method, and the patterning is performed by the RIE.
申请公布号 JPS5972743(A) 申请公布日期 1984.04.24
申请号 JP19820182865 申请日期 1982.10.20
申请人 TOSHIBA KK 发明人 TERADA TOSHIYUKI;MIZOGUCHI TAKAMA
分类号 H01L21/3213;H01L21/302;H01L21/3065 主分类号 H01L21/3213
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