| 摘要 |
PURPOSE:To contrive to reduce consuming electric power and to enhance the operating speed of a semiconductor memory device by a method wherein the memory device is constructed of a peripheral circuit part of CMOS structure and a bi-polar memory cell formed by the same manufacturing process with the former. CONSTITUTION:N<+> type diffusion regions 4, 5, a gate SiO2 film 6, and a gate electrode film 7 to construct an N channel MISFET are formed in a P well 2 at the peripheral circuit element region A, and moreover P<+> type diffusion regions 8, 9, a gate SiO2 film 6, and a gate electrode 10 to construct a P channel MISFET are formed on a substrate 1. Both the MISFET's thereof are connected mutually with an aluminum wiring 12 on a phosphate glass film 11 to construct a CMOS. While the memory part B is constructed of the bi-polar part memory cell, and has a P<+> type diffusion region 15 formed by the same process with the P<+> type regions 8, 9, and an N<+> type diffusion region 16 formed by the same process with the N<+> type regions 4, 5 in a P well 3, and moreover has a ringed N<+> type diffusion region 17 formed by the same process with the N<+> type regions 4, 5 in the substrate 1. |
