发明名称 TESTING DEVICE FOR LSI
摘要 PURPOSE:To test simultaneously and efficiently LSI devices which require a CPU and other MATCH modes by placing those LSI devices in the same internal state and then testing their functions simultaneously. CONSTITUTION:A control part 1 executes the test in the same address by the maximum MATCH frequency programmed completely without reference to MATCH detection states of the LSIs to be tested, and moved to the next address when the test is completed at the maximum frequency. A test pattern expelling part 3 stops the supply of a test signal PT2 to an LSI5 placed in the MATCH state firstly and waits another LSI6 to enter the MATCH state; after the both are put in the same state, a program counter is driven to advance to the next address. Thus, the plural LSIs are tested synchronously.
申请公布号 JPS5960369(A) 申请公布日期 1984.04.06
申请号 JP19820171721 申请日期 1982.09.30
申请人 TOSHIBA KK 发明人 IZAWA KIYOSATO
分类号 G01R31/28;G01R31/317;G01R31/319;H01L21/66 主分类号 G01R31/28
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