Memory redundancy apparatus for single chip memories

摘要

An improved addressing means for single chip memories which include a plurality of redundant lines and associated cells is described. Y address signals are used during programming to select and program redundant X decoders. The redundancy apparatus is implemented without any additional package pins and programming may be performed after packaging. The apparatus includes means for permanently disabling further programming of the redundancy circuitry to prevent inadvertent programming by a user.