| 摘要 |
PURPOSE:To reduce power consumption by shutting off a current path between a power source or earth and a system bus when the system bus has a logical potential different from a power source potential or earth potential. CONSTITUTION:When a clock phi2 applied to a line 35 is held at a high level, a precharge signal 35 holds the system buses 33 and 34 at high levels. When a clock phi1 is held at a high level, for example, when the contents of a register 2 are outputted through an output part 32 through a transfer gate 45 by a control signal 37, the system bus 33 is still held at the high level. Then, when the output of the register 2 has a low level, a transistor 63 is turned off and a DC path from a power source VDD to the system bus 33 is not formed. Therefore, power consumption is reduced. |
