发明名称 DYNAMIC MEMORY CELL
摘要 PURPOSE:To prevent the destruction of stored information in a memory cell even in case of the incidence of one or more alpha particles or the like, by using a pair of field effect transistors (TRs) different in a conductive type as a selecting gate to store the signal electric charge in both electrodes of a cell capacity. CONSTITUTION:A cell capacity CS is connected between the respective sources of the first conductive-type, for example, a N-channel MOS TR T0, which has the gate connected to a word line WL0 and has the drain connected to a bit line B, and the second conductive-type, for example, P-channel MOS TR T2 which has the gate connected to a word line WL1 and has the drain connected to a reference potential power line. Minimum and maximum potentials used in a semiconductor device including memory cells are used as substrate potentials VN and VP of the MOS TRs T0 and T1, and the substrate potential VP is supplied to a reference potential power source line PS. Since both electrodes of the cell capacity are held in a floating state, the electric charge stored in the cell capacity is not lost even if the potential of one electrode is varied by the incidence of alpha particles, thus, the destruction of the stored contents is prevented.
申请公布号 JPS5956295(A) 申请公布日期 1984.03.31
申请号 JP19820167818 申请日期 1982.09.27
申请人 NIPPON DENKI KK 发明人 TERADA KAZUO;TAKESHIMA TOSHIO
分类号 G11C11/405;G11C11/34;H01L21/8242;H01L27/108 主分类号 G11C11/405
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