| 摘要 |
PURPOSE:To realize the nesting of a subroutine without providing an exclusive register, by providing a gate circuit on an address line between a memory and a processor and a latch circuit connected to a bus line of the processor. CONSTITUTION:An address selection signal AS generated from a control signal generating part CONT is set at a high level. Thus a gate group Gg10 is turned on, and a gate group Gg5 is turned off via an inverter. Then a clock is generated to store the 12-bit data stored in a latch circuit group Rg11 is then stored in latch circuit groups Rg7 and Rg8 respectively. With this instruction the address to be executed next is not equal to an address that is designated in the instruction but an address that is stored in the Rg11. Thus it is possible to change the address to be executed next within a program without using an exclusive register. |
