摘要 |
PURPOSE:To perform partial counting in various methods without disturbing the driving of a program, by connecting a counting means to a bus of a processor to count directly a signal of an instruction fetch signal line. CONSTITUTION:A processor 1 is connected to a memory 2 via an instruction fetch signal line 3, an address bus 4 and a data bus 5, and at the same time executed instruction number (DS) counting means 6-8 are connected to buses 3-5. The means 6 sets 61 an address for each interruption processing and compares 62 these addresses. Then the means 6 turns on a count enable signal line 67 when the coincidence is obtained from said comparison and performs counting 64 with a delay 63 given for each interruption to complete the counting with disenable 66 given when the interruption routine is through. In the same way, the count means 7 and 8 count the DS of each mode or the DS within each designated address range. Thus it is possible to count the DS and then facilitate an easy change of the counting range without giving any effect to a program to be counted. |