| 摘要 |
PURPOSE:To prevent software errors of a static RAM comprising an IGFET, by coating the bottom of a memory node layer of memory cells by a P layer or an N layer. CONSTITUTION:N<+> layers 26, 13, and 27 are provided in the P layer of an N type substrate as specified and operated as a memory node. An ion implanting layer 9 is selectively formed so as to cover the bottoms of the N<+> layers 26, 13, and 27. For this purpose, at first, memory cell forming region is provided in a field oxide film 8, and then the ion implanting layer 9 is provided. Heat treatment for a long time period at the time of forming the thick oxide film is avoided, and the rediffusion of the layer 9 is prevented. Thus software errors can be sufficiently prevented and the adverse effect on the FET characteristics is prevented. For example, in the implantation into a memory cell forming part X1, a resist mask is provided, and the ions are implanted into only the memory node connecting a driving FET Q2 and an FET Q4 for transmission. Thus the implantation to the unrelated nodes for peripheral circuits, data lines, and the like are avoided. By this method, a highly reliable static RAM is obtained. |
