发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To lay out a large scale circuit by dividing the arrangement of unit cells into two steps in a staged manner, regularly queue-arranging the unit cells at a lower position and constituting an upper unit. CONSTITUTION:Unit cell arrangements 111-113 at an upper position are connected mutually by using wiring channels 121, 122, each cell at the upper position is constituted by unit cell arrangements 211-213 at the lower position and wiring channels 221-224, and the wiring channels 121, 122 and 221-224 are arranged orthogonally. The inside of a block constituting the upper unit cells is laid out automatically by using the lower unit cells and an automatic arrangement wiring program, and input/output wirings to the lower unit cells are penetrated to the cells and drawn out in the vertical direction. Automatic arrangement wiring between blocks prepared is executed by using the same program after automatic arrangement wiring within an allowable range on the number of the cells and the number of the channels. According to the method, the large scale circuit in an extent impossible in conventional methods is laid out, and the IC device can be formed.
申请公布号 JPS5954239(A) 申请公布日期 1984.03.29
申请号 JP19820165404 申请日期 1982.09.22
申请人 TOKYO SHIBAURA DENKI KK 发明人 HIRABAYASHI AKIJI
分类号 H01L21/82;H01L21/822;H01L27/04;H01L27/118;(IPC1-7):01L21/82 主分类号 H01L21/82
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