| 摘要 |
PURPOSE:To enable a highly accurate measurement of a phase difference regardless of the frequency level of voltage to be measured, low or high, by providing a synchronization circuit to turn the measuring time to a square wave, namely an integral cycle of voltage to be measured. CONSTITUTION:A first DFF101 is a synchronization circuit between a V2 output and an MSB (max. bit) output. Outputs Q2 and Q3 synchronized with a clock pulse CL are applied to second and third gates 12 and 13. Counts n1 and n2 of an up/down counting circuit 14 and an up counting circuit 17 are applied to an arithmetic circuit 18, where Kn1/n2 is computed to determine a phase difference. When the phase of the square wave V1 is ahead of the phase of the square wave V2, an advance pulse is outputted for the time range from the rising of V1 to the rising of V2 and that from the falling of V1 to the falling of V2. But no lag pulse is outputted. Counts n1 and n2 are sent to an arithmetic circuit 8 to compute and based on the results, a phase difference can be determined. |
