| 摘要 |
PURPOSE:To set a PLL frequency with more fine step in a range of a basic frequency, by frequency-dividing a frequency data of a frequency data generator, D/A-converting its output and inputting the result to a reference signal generating means. CONSTITUTION:A frequency data 104 from a frequency data generating circuit 18 is applied to a reference signal generating means 10 to decide the oscillating frequency of a reference signal and the reference signal and a PLL frequency dividing ratio data 102 decide the frequency of a PLL signal 106 in a PLL loop 14. Data values n, Am of the data 102, 104 designate respectively a high-order frequency digit and a low-order frequency digit. The data 104 is operated into Am/n at an operating device 48, D/A-converted 52 and applied to a frequency adjusting circuit 52. The oscillating frequency of an oscillating element 52 is shifted from a stationary frequency fr with a unit frequency adjusting amount DELTAf of the output of the circuit 52, the oscillating frequency of an oscillator 44 is fr+Am DELTAf/n and the frequency of the reference signal is 1/A(fr+AmDELTAf/n), and applied to the PLL loop 14. The signal 106 is changed in a fine step by changing the (m). |
