Monolithic semiconductor memory.

摘要

A semiconductor memory having data lines (Doo- D13) divided lengthwise, which data lines cross word lines (W) in a memory cell array and selectively coupled to memory cells (MC) is disclosed. A plurality of second data lines I/0(0), 1/0(1) are arranged one for each of predetermined groups of the data lines to exchange data through first switches (SWoo-SW13), and one or more third data lines (I/O) are arranged orthogonally to the second data lines to exchange data with the second data lines through second switches (SWYO, SWY1). Read/write controllers (RWC) are coupled to the third data lines. Data are read and written for desired memory cells by selective drive of the word lines and the first and second switches.