发明名称 CONTROLLING DEVICE OF INTERRUPTION
摘要 PURPOSE:To reduce the overhead of a branch to an interruption processing program, by providing the titled device with an interruption response vector generating register group or the like corresponding to respective I/O devices. CONSTITUTION:The titled device is provided with an interruption response vector generating register group or the like corresponding to respective I/O devices. When an interruption request is generated from an I/O device 20i to an operation processing unit 101 through an interruption request line 103 e.g., a previously set up interruption response vector storing address is accessed through an interruption controlling part 106 and the accessed value is stored in a program counter. Subsequently, an address decoding signal is outputted from the interruption controlling part 106 to an interruption response vector output request line 105 to inhibit data output from devices other than the interruption response vector generating register 30i to a bus 104, and the address decoding signal is applied to the I/O device 20i. Then the value of the interruption response vector generating register 30i is outputted from the I/O device 20i to the bus 104.
申请公布号 JPS5936836(A) 申请公布日期 1984.02.29
申请号 JP19820147964 申请日期 1982.08.25
申请人 MATSUSHITA DENKI SANGYO KK 发明人 NAKANO YOSHIO;KUSHIKI YOSHIAKI
分类号 G06F13/24;G06F9/48 主分类号 G06F13/24
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