发明名称 INTEGRATED CIRCUIT DEVICE WITH J-FET
摘要 PURPOSE:To obtain an integrated circuit device which can add an electrostatic protection structure of a J-FET without deteriorating the integration by preventing the electrostatic damage of an element with a diode for protecting the diode of an isolation region against the electrostatic damage of the J-FET. CONSTITUTION:Diodes 2, 3 for protecting a J-FET1 are formed in an isolation region 5-2, and the diode 2 is formed of an N type region 9 and a P type isolation region 5-2 which are made to approach to a source region 7. The diode 3 is formed of an N type region 10 and a P type isolation region 5-2 which are made to approach to a drain region 8. These diodes 2, 3 are respectively connected between the gate and the source of the J-FET1 itself and to a P-N junction between the gate and the drain in parallel. Thus, the source region 7 and the N type region 9 of the diode 2 are connected via an electrode wiring layer 13, and the regions 8, 10 are similarly connected. In this manner, a current is flowed to the diodes 2, 3 which have low withstand voltage, but a current due to a high voltage is not flowed to the J-FET element, thereby protecting the J-FET element against the electrostatic damage.
申请公布号 JPS5933861(A) 申请公布日期 1984.02.23
申请号 JP19820143730 申请日期 1982.08.19
申请人 PIONEER KK 发明人 TANIGAWA YOSHIKI
分类号 H01L29/812;H01L21/338;H01L21/8232;H01L27/02;H01L27/06 主分类号 H01L29/812
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