| 摘要 |
PURPOSE:To reduce the simulation time, by classifying a logical device to be tested into logical blocks in the order of operation, performing the pipeline processing for the simulation of the logical blocks and attaining the classification with serial processing in the order of operation. CONSTITUTION:The operation of IC simulation classified with level numbers consists of four operations. An input pin data is read out from a status memory (SM) 7 in the 1st operation, and the simulation is attained at an IC simulator (SIM) 9 and the output pin data change position information is formed. The 2nd operation is an operation forming an output pin number from the output pin data change position information. The 3rd operation is an operation reading out the connected input pin number and the output pin number of itself from a connected memory (CM) 21 out of the output pin number. The 4th operation is an operation to revise the input pin data and output pin data corresponding to the input and output pin number. These operations are done in parallel at the same time. |
