发明名称 AD CONVERTING CIRCUIT
摘要 PURPOSE:To reduce the cost, by providing a memory compensating the nonlinearity of an AD converter to allow the nonlinearity of the AD converter and improving remarkably the yield of the AD converter. CONSTITUTION:An analog input VIN passes through a sample holding circuit 31 and is inputted to the AD converter 32 the nonlinearity of which is permitted to the direction producing an idle code. A digital output of the converter 32 is stored in a register 33 and addresses a compensation conversion memory 34 such as a P-ROM. The normal code after compensation predetermined at each digital output of the converter 32 is written in the address based on the measurement of the nonlinearity of the converter 32 measured in advance.
申请公布号 JPS594323(A) 申请公布日期 1984.01.11
申请号 JP19820113614 申请日期 1982.06.30
申请人 SHIMAZU SEISAKUSHO KK 发明人 KUMAZAWA YOSHIHIKO;NAKAOKA SHIYOUICHI
分类号 H03M1/10;H03M1/06 主分类号 H03M1/10
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