| 摘要 |
PURPOSE:To constitute simply a latch circuit inverting an output in synchronization with an input signal and a clock pulse, by using a circuit element comprising two C-MOS inverters and two MOS transistors(TRs). CONSTITUTION:The 1st C-MOS inverter CL1 inverts an input data signal Di and supplies the output to the 1st MOS TRT1. The 2nd C-MOS inverter CI2 is connected to the output of the 1st MOS TRT1. The 2nd MOS TRT2 given to a clock pulse CLK is connected to the 1st MOS TRT1. Thus, a latch output where either one of the inverted rise and fall is synchronized with the clock pulse and the other is inverted in synchronization with the input data signal, is obtained at an output OUT of the 2nd MOS inverter CI2. |
