| 摘要 |
<p>PURPOSE:To form a synchronizing clock with a simple constitution and with a low cost by providing an oscillator oscillating by the frequency twice of a video frequency, th first and the second D type flip flops and a gate circuit and obtaining a video frequency signal corresponding to a horizontal synchronizing signal from the Q output of the second D type flip flop. CONSTITUTION:When the horizontal synchronizing signal the inverse of HSYN from a video device is changed from L to H, the Q output CSFL O of the flip flop 7 is inverted from L to H, the inverse of the Q output CSFL 1 is inverted from H to L. Accordingly from the time when the inverse of the Q output is inverted, the output; the inverse of ACLK of an inverter 3 is outputted. Since a signal BCLK is inputted to the clock terminal of the flip flop 8, the flip flop 8 repeats the inverting operation according to the signal BCLK. Accordingly, the Q output CLK of the flip flop 8 is divided in frequency into 1/2 of the frequency of the oscillator 1 and it can be used as the synchronizing clock.</p> |
