发明名称 COMMUNICATION SYSTEM IN MULTIPROCESSOR SYSTEM
摘要 PURPOSE:To attain the setting of a communication request processor number with one memory cycle, by providing a communication request control section having a register for the communication request between processors and additional information, to a common memory device. CONSTITUTION:The multiprocessor system consists of processors PC1-n, a common memory device A, and a communication request control section B having a register for the communication request and additional information for the communication between PCs in a prescribed address of the device A, and the control section B and each PC are connected with a system bus C and communication request signal lines D1-Dn. Since the setting of the communication request PC number and the transmission of the communication request signal are done in the same register and it is possible for the setting of the PC number and the transmission of the request signal with one memory access. Further, in setting the request PC number and the communication request information, since the information of L other than the own bit is transmitted on a write data bus, the accessing is done without destroying other communication request PC number information.
申请公布号 JPS592468(A) 申请公布日期 1984.01.09
申请号 JP19820109740 申请日期 1982.06.28
申请人 OKI DENKI KOGYO KK 发明人 SHIMIZU GIICHI
分类号 G06F15/16;G06F13/18;G06F15/167;G06F15/177 主分类号 G06F15/16
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