| 摘要 |
<p>A levelized simulation system includes a means for storing a model of a logic system to be simulated. The logic system has a plurality of levels of logic which are synchronously clocked. A processing system (l9) includes an arithmetic logic unit (3l) which sequentially tests each element of said logic system, one level of logic at a time. Thus each logic element in the first level is tested with the results there stored in a state memory (2l), after which the logic elements of the second level of the logic system are tested and so on. During each test a comparison is made to determine whether there is a defect in the logic design.</p> |
