| 摘要 |
PURPOSE:To constitute a circuit not requiring an operational amplifier and a comparator with high speed and high gain, by using a CCD delay line for a shift register. CONSTITUTION:An error signal being a difference between an output signal and a reference signal is inputted to a CCD shift register 51 while being kept as an analog signal. The CCD shift register 51 shifts sequentially error signals within the range of equalization. After inputting the error signal having a required bit number, a tap gain correcting circuit 7 reads out successively each tap gain from a tap gain memory 6, corrects it according to the error signal written in the CCD shift register 51 and inputs the result to the tap gain memory 6 again. |
