发明名称 SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
摘要 PURPOSE:To enable to easily prepare the layout of the circumference of a bonding pad by a method wherein a part of a resistor is formed as a part of the source or drain region of MISFET, thereby enabling to reduce the occupation area of said resistor and to improve the degree of integration. CONSTITUTION:A resistor R2 is formed in such a manner that a part of which will be used as a part 14 of the P<+> type drain region 11 of the P-MIS Q5 on an output part. To be more precise, said resistor R2 consists of the part 14 of the P<+> type drain region 11 and a P<+> type region 15. Said P<+> type region 15 is connected to the N-MIS Q2 of the input part 5 and the gate electrode of a P- MIS Q3. Oblique lines are drawn on the region which functions as the resistor R2. The gate electrode of Q5, wherein a part 14 of the drain region 11 is used as a part of the resistor R2, is therefore formed in bent form, not in a straight line as in the gate electrode of Q4. The drain region 11, located on the part where the drain region 11 and an aluminum wiring 18 are contacted, is formed width, whereas the drain region on the region 14 is formed narrower in width. The resistance value of the region 14 can be increased by narrowering the width of the region 14.
申请公布号 JPS58222573(A) 申请公布日期 1983.12.24
申请号 JP19820103757 申请日期 1982.06.18
申请人 HITACHI SEISAKUSHO KK;HITACHI MAIKURO COMPUTER ENGINEERING KK 发明人 TAKEI SUMIAKI;MASUDA KENZOU
分类号 H03F1/52;H01L21/822;H01L27/02;H01L27/04;H01L27/06;H01L29/78;H02H7/20;H03F1/42 主分类号 H03F1/52
代理机构 代理人
主权项
地址