| 摘要 |
PURPOSE:To reduce the test time of an RAM part for a static RAM containing a data writing/reading circuit, by using a test circuit which controls both writing and reading directions of data. CONSTITUTION:It is supposed that either one of points (a)-(d) is open or short as a factor for a defect of an RAM. For instance, ''0'' is supplied to a DATAIN to check the open at the point (a) or (b) and the short at the point (d). Then a ternary output buffer 8' and a ternary input buffer 7' are set in a writing state and a non-writing state respectively. Thus the data is written to the RAM through the buffer 8'. If no defect exists, a point Q, i.e., a real output of the RAM is set at ''0'' and then read out to a DATAOUT. Thus the data written into the RAM is instantaneously read and checked, and therefore the test time is reduced. |
