| 摘要 |
PURPOSE:To generate a regenerative clock with less shift from a PLL with a simple constitution, by adding an RF level detecting circuit and the like to the titled circuit so as to make the input fed to a tank circuit constant even if a part of a transmitted time series signal is missing. CONSTITUTION:An RF digital signal from a regenerative digital input terminal 7 is demodulated at a demodulating circuit 8, and applied to an edge detecting circuit comprising an exclusive OR circuit 12 and a delay circuit 13 via an LPF10 to detect each edge part. A frequency being a natural number multiple of its edge detecting signal is extracted at a capacitor C1 and a coil L1 for a tank circuit and applied to the PLL17. Further, the level of a signal from the terminal 7 is detected at the RF level detecting circuit 9 and the consecuting time below a prescribed level not demodulated at the circuit 8 normally is discriminated at a time discriminating circuit 15. Further, an output is applied to an AND circuit 14 inputting an output of the edge detecting circuit, so as to make the input to the tank circuit constant, allowing to output a regenerative clock with less shift from the PLL17. |
