| 摘要 |
PURPOSE:To reduce a through-current of a data read invertor, and to reduce the power consumption, by detecting a prescribed precharge level of a bus line, and executing sufficiently precharging to the bus line. CONSTITUTION:Precharging of a bus line 1 is executed by providing a synchronizing circuit 12 and a precharging transistor TR 2 on the bus line 1. A level detecting circuit 13 having an invertor 14 is connected to this bus line 1, and by this circuit 13, a prescribed precharge level of the bus line 1 is detected. When this circuit 13 starts its detecting operation, an output is generated after a suitable time from a delaying circuit 15 provided with invertors 16, 17 and capacity 18. By an output of this circuit 15, an NAND circuit 12 of a synchronizing circuit 11 for inputting a clock phi is controlled, and precharge is stopped. Subsequently, the voltage is dropped by a level-down circuit so that an output from the circuit 15 is not inputted to the circuit 12 until the precharge exceeds a prescribed detected level. |
