发明名称 MEMORY BIT INSPECTION DEVICE
摘要 PURPOSE:To contrive to shorten the inspection time for defect bits and facilitate the work by a method wherein defect points are set at fixed positions by the feedback control of the position of an XY table by comparing the position of the table with the data from a failure bit map. CONSTITUTION:The failure bit data 20 obtained by testing a wafer 10 in a tester 22 is inputted to a comparing circuit 19 in an instruction part 18 and then compared with the design data 21, and consequently the coordinates of the defect bit is computed in an XY position computing circuit 23. Then, in a control part 14, a positioning circuit 15 controls an XY table drive mechanism 13, based on this signal of XY positional coordinates, and thus the XY table 12 is moved to directions X and Y. Thereat, the present position of the XY table, or that of the wafer 10 according to cases is inputted from a position detector 16 to a comparing circuit 17 and compared with the signal from the instruction part 18, which is outputted to the positioning circuit 15 as a correction value. Thereby, the XY table 12 is controlled by feeding back at the fixed position. The defect bit on the wafer 10 is set accurately at the position corresponding to an inspector 11 by this control.
申请公布号 JPS58207647(A) 申请公布日期 1983.12.03
申请号 JP19820089658 申请日期 1982.05.28
申请人 HITACHI SEISAKUSHO KK 发明人 TANIGUCHI YUUZOU;TANABE ISAO;NAGATOMO HIROTO;TANIMOTO MICHIO;SAITOU MIKITO
分类号 H01L21/66;H01L21/8247;H01L29/788;H01L29/792 主分类号 H01L21/66
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