| 摘要 |
PURPOSE:To make it possible to measure pulse frequency in good preciseness even when input frequency is chaned over a wide range, by dividing the number of pulses arriving within a predetermined time interval by a net time required in the arrival of said number of pulses. CONSTITUTION:A loop counter 2 generates a timing pulse B with a definite cycle by repeating operation counting the internal reference pulse A of a CPU circuit 8 until predetermined numbers PT. On the other hand, an input pulse C is inputted in a counter 3 through the matching circuit 1 and a counter 4 is cleared zero each time by an input pulse D. When the CPU circuit 8 receives the pulse B as an interruption signal, a retention indicating signal is imparted to latch circuits 5, 6, 7 and the valves Qn, Mn, Pn thereof are taken in. In addition, the previous values Qn-1, Mn-1, Pn-1 stored in a memory circuit 9 are taken out and predetermined operation is carried out corresponding to the decided result according to the size of Mn and Mn-1 to output the operated result to a data receiving circuit 10 as a frequency measuring value. |
