| 摘要 |
PURPOSE:To obtain reference voltage with few variations and no need of adjustment after manufacturing by detecting the voltage almost equal to the energy gap between Si semiconductors as the reference. CONSTITUTION:A P<-> layer 2 is formed in N-type Si 1 and openings are made selectively after stacking a gate oxdation film 4 and intrinsic polycrystal Si 5 thereon in turn. With use of an SiO2 mask 6, an N-layer 7 and N-type polycrystal Si 8 are formed by diffusion. Then, with use of an SiO2 mask 9, a P-layer 10 and P-type polycrystal Si 11 are formed by ion implantation and these are treated at 900 deg.C for 10 minutes. After coating with PSG12, Al electrodes 13 are selectively provided to form P-channel FETA, B and N-channel FETC, D. When connecting drains and gates of such FETT1, T2 in common and then operating thus obtained device at constant current I0, the difference in threshold voltages can be taken out from the difference in drain voltages because FETT1, T2 are different in their threshold voltages and equal in mutual conductances. Difference in Fermi levels between N-type and P-type semiconductors are obtained with use of N<+> and P<+> gate FET. |
