| 摘要 |
PURPOSE:To remove the high harmonic component in the titled circuit by a method wherein the second PWM wave is formed using a counter, the second PWM wave is formed into a symmetrical waveform with 90 degrees as the center in such a manner that the first PWM wave will be inverted from upcount to downcount at 90 degrees in synchronization with the first PWM wave. CONSTITUTION:The pulse sent from a clock pulse generating circuit 1, containing a variable frequency divider, is inputted to an up-down counter 3 through the intermediary of the waveform shaping circuit 2 which was formed using FF. The output of the counter 3 is inputted to angle setting circuits 4-11, and each angle setting signal is inputted to an angle composing circuit 12. The output of the circuit 12 is inputted to a correcting circuit 20 and latch circuits 14-16 through the intermediary of a distribution circuit 13, and an inversion signal of double pulse width modulated wave is given to each latch output respectively at phase inversion inverters 41-43 through the intermediaries of AND gates 26-28. Through these procedures, the second PWM wave is formed utilizing a counter 30, and the second PWM wave is formed into a symmetrical waveform with 90 degrees as the center in such a manner that it is inverted from upcount to downcount at 90 degrees of the first PWM wave in synchronization with the first PWM wave. |
