| 摘要 |
PURPOSE:To obtain an IC containing a high speed bi-polar transistor, by improving the low speed property of a transverse directional bipolar transistor and the controllability of a vertical type bi-polar transistor. CONSTITUTION:Two N<+> type buried regions and a buried regions 32 of lamination with N<-> type and P<+> type are provided on a P type semiconductor substrate 31, and an N type layer 33 is epitaxially grown over the entire surface including it. Next, the layer 33 is insulated and isolated into three islands by four P<+> type regions 35 which reach the substrate 31, while including the regions 32 respectively, then a P<-> type resistant region 40 is diffusion-formed in one of them, and resistant contact regions 44 are provided therein. A P type base region 43 of a transverse type N-P-N transistor is diffusion-formed in one of adjacent islands, then an N<+> type emitter region 46 is provided therein, and an N<+> type collector contact region 47 is diffusion-formed by being adjacent to the region 43. The remnant one of the island regions 32 is further surrounded by a P<+> type region 37 and an N<+> type region 38, then an N type base region 41 of the vertical type P-N-P transistor is diffusion-formed therein, and a P type emitter region 42 and an N<+> type base contact region 45 are provided therein. |
