发明名称 ANALOG MEMORY
摘要 PURPOSE:To reduce the disturbance of noise due to uneven characteristics of cell, by changing the position of a memory cell and the correspondence of time series of signals recorded to a memory in terms of time. CONSTITUTION:The input signals are supplied to a basic memory cell group 2 and a redundant memory cell group 3 via a line 1. The output of each cell group is sent to a common line 4. At the same time, both writing and reading are controlled by a common writing and reading control lines 5 and 6 respectively. The cells of the group 3 are selected by redundant cell selecting lines 8-1-8-m (m: number of cells of group 2). An address circuit 9 produces signals to cell selecting lines 7i and 8i for reading and writing with signals applied from address lines 10-1-10-l and address control lines 11-1-11-k. The signal applied to a selecting line 10i designates (n) units of memory cells in response to the time series of the signal. The signal applied to a line 11 changes the correspondence with line 10, 7 and 8 in terms of time.
申请公布号 JPS58179998(A) 申请公布日期 1983.10.21
申请号 JP19820061066 申请日期 1982.04.14
申请人 HITACHI SEISAKUSHO KK 发明人 MATSUI KAZUMASA
分类号 G11C27/00;(IPC1-7):11C27/00 主分类号 G11C27/00
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