| 摘要 |
PURPOSE:To improve the debugging processing ability and the operability, by interrupting a CPU and stopping the execution of a program, when the content of a specific address of a memory is coincident with the predetermined specific value. CONSTITUTION:The CPU outputs an address enable signal (ALE) at the beginning of the machine cycle, sets a flip-flop 7, a hold (HOLD) signal is outputted to the CPU for the purpose of holding. The CPU falls to the hold state by setting a hold acknowledge signal (HLDA) after the end of the machine cycle. When a comparator 4 outputs a coincidence signal, a flip-flop 6 is set, an interruption request signal (INTR) is outputted and interruption is requested to the CPU. Owing to the interruption introduced to the CPU, it is detected when the DMA was transferred; and at which part of the program is executed. |
