发明名称 ERROR CORRECTING SYSTEM OF CONTROL STORAGE DEVICE
摘要 PURPOSE:To reduce the amount of hardware, by providing a register which holds a pair of an error address and a corrected micro instruction word when a recoverable error is detected and comparing an error address with the value held in this register when an unrecoverable error is detected and writing the corrected micro instruction word again if they coincide with each other. CONSTITUTION:When a one-bit error is detected by a means ECC, a fixed error holding register 6 holds a pair of the current value of a micro instruction counter 2 and corrected data. When a two-bit error is detected, the current value of the micro instruction counter 2 is compared with the error address held in the register 6; and if they coincide with each other, corrected data held in the register 6 is written again. Thus, the two-bit error which cannot be recovered only with an error correction code can be corrected.
申请公布号 JPS58171792(A) 申请公布日期 1983.10.08
申请号 JP19820052946 申请日期 1982.03.31
申请人 FUJITSU KK 发明人 MARUYAMA MITSUYUKI
分类号 G06F9/22;G06F11/10;G06F12/16 主分类号 G06F9/22
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