| 摘要 |
This device comprises a detection circuit (3) for identifying a frame identification word, comprising a synchronisation (4) for monitoring and controlling the phase angle of a demultiplexer (22) and of a clock generator (6), in which an additional pulse frame counter (5) is connected to the synchronisation, which is synchronised by each received frame identification word. The clock generator (6) and the demultiplexer (22) are only resynchronised when the new phase angle has been detected with the aid of the additional pulse frame counter (5). This prevents unnecessary synchronising processes by adjusting the clock generator (6), and the associated reception of faulty characters. <IMAGE> |
