发明名称 CRT deflection distortion correcting circuit.
摘要 <p>A deflection distortion correcting circuit for CRT displays with interlaced scanning is disclosed, which corrects concurrently both linearity of vertical deflection and pairing of horizontal interlaced scanning lines which is caused by variation in anode voltage. This is achieved by combining an adder (26) with a cubic curve linearity correction circuit (12, 14, 16) to introduce a pairing correcting component related to the variation in anode voltage into the cubic curve linearity correction.</p>
申请公布号 EP0089505(A1) 申请公布日期 1983.09.28
申请号 EP19830101762 申请日期 1983.02.23
申请人 INTERNATIONAL BUSINESS MACHINES CORPORATION 发明人 YAMAGUCHI, HIDEFUMI
分类号 H04N3/23;H04N3/22;H04N3/233;(IPC1-7):04N3/22;01J29/70;09G1/16;04N3/16 主分类号 H04N3/23
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