发明名称 MULTI-ACCESS BULK CONTROL SYSTEM
摘要 PURPOSE:To facilitate the production of the software of a CPU itself, by eliminating the exclusive communication control between CPUs. CONSTITUTION:When a reading request reaches a bulk memory controller 12 from a CPU15-N, the controller 12 sets a unit bit memory 14 of an exclusive control memory part 13 corresponding to a designated memory place 11. Under such conditions, a request for the place 11 is given from a CPU15-1. In such a case, the controller 12 transmits a busy signal of a bulk memory 10 to the CPU15-1 without giving an access to the memory 10 as long as the setting of the memory 14 is decided from its contents. While the memory is set again if it is reset reversely, it is set to access the memory 10.
申请公布号 JPS58159165(A) 申请公布日期 1983.09.21
申请号 JP19820042104 申请日期 1982.03.17
申请人 TOKYO SHIBAURA DENKI KK 发明人 UCHIDA HIROSHI
分类号 G06F12/00;G06F9/52;G06F13/16 主分类号 G06F12/00
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