发明名称 TTL CIRCUIT
摘要 PURPOSE:To accelerate a response and to prevent the generation of a distortion output, by abosrbing the stored charge of a transistor which forms the output stage of a TTL circuit by a capacitor which is charged alternately through both poles in response to level variations of an input signal. CONSTITUTION:A discharging circuit 2 is provided with a transistor TRQS, a resistance RS which supplies a base current and a capacitor CS which absorbs the stored charge. The emitter of the TRQS is connected to the base of a TRQ6. When the input signals to terminals A and B are set at H levels, the TRQ6 and TRQ1 are turned on. Thus the charging current flows to the TRQS and the capacitor CS. When either one of these two terminals is changed to an L level, the TRQ6 is turned on. Then the charge stored at the base of the TRQ1 is absorbed to the capacitor CS. Therefore the switching time is shortened to eliminate the distortion of a waveform when the TRQ1 is changed to OFF from ON.
申请公布号 JPS58156229(A) 申请公布日期 1983.09.17
申请号 JP19820038029 申请日期 1982.03.12
申请人 HITACHI SEISAKUSHO KK 发明人 HOASHI MASAAKI
分类号 H03K19/013;H03K19/088;(IPC1-7):03K19/088 主分类号 H03K19/013
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